A desirable feature of a SERDES (serializer/deserializer) design is power savings. One way to achieve power savings is by keeping a CDR (clock/data recovery) circuit OFF during most of the time when a link is active between a transmitter and a receiver. However, due to voltage supply noise, temperature fluctuations and uncorrelated crosstalk, the receiver data may shift and/or the eye may collapse if the CDR is not turned ON to take care of these modulations. Such undesirable modulations can cause link failures.